<?xml version="1.0" encoding="utf-8"?> <feed xmlns:dc="http://dublincore.org/documents/dcmi-namespace/" xmlns:media="http://search.yahoo.com/mrss/" xmlns="http://www.w3.org/2005/Atom"> <title type="text">Primarius Technologies Co. Ltd.</title> <subtitle type="text">Contains the last 20 releases</subtitle> <id>uuid:b9ef34de-6744-4bb4-ad9d-cb4720fc786f;id=6800</id> <rights type="text">Copyright 2020, Primarius Technologies Co. Ltd.</rights> <updated>2020-12-15T16:00:00Z</updated> <author> <name>newsdesk@globenewswire.com (NewsDesk)</name> <uri>http://www.globenewswire.com/LegacyRss?Length=4</uri> <email>newsdesk@globenewswire.com</email> </author> <link rel="alternate" href="https://www.globenewswire.com/atomfeed/organization/IMRgkHodcR-EeRMKLT-42A==" /> <link rel="self" href="https://www.globenewswire.com/atomfeed/organization/IMRgkHodcR-EeRMKLT-42A==" /> <entry> <id>https://www.globenewswire.com/news-release/2020/12/15/2145594/0/en/Primarius-Will-Present-an-Invited-Paper-on-Spec-Driven-Extraction-Flow-and-Exhibit-at-IEDM-2020.html</id> <title type="text">Primarius Will Present an Invited Paper on Spec-Driven Extraction Flow and Exhibit at IEDM 2020</title> <published>2020-12-15T16:00:00Z</published> <updated>2024-11-24T22:05:31Z</updated> <link rel="alternate" href="https://www.globenewswire.com/news-release/2020/12/15/2145594/0/en/Primarius-Will-Present-an-Invited-Paper-on-Spec-Driven-Extraction-Flow-and-Exhibit-at-IEDM-2020.html" /> <content type="html"><![CDATA[<p>SAN JOSE, Calif., Dec. 15, 2020 (GLOBE NEWSWIRE) -- This year, the IEEE International Electron Devices Meeting (IEDM) themed "Innovative Devices for a Better Future", will be held virtually December 12~18. There will be rich technical programs with 41 sessions covering electronics technologies being used much more broadly than ever before to address the world’s most pressing challenges.<br></p>]]></content> <dc:identifier>2145594</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>Primarius Technologies Co. Ltd.</dc:contributor> <dc:modified>Tue, 15 Dec 2020 16:00 GMT</dc:modified> <dc:subject>Calendar of Events</dc:subject> </entry> <entry> <id>https://www.globenewswire.com/news-release/2020/07/16/2063290/0/en/ProPlus-Electronics-Will-Demonstrate-The-Fastest-EDA-Software-Tools-And-AI-Driven-Test-Measurement-Equipment-at-the-2020-Virtual-DAC.html</id> <title type="text">ProPlus Electronics Will Demonstrate The Fastest EDA Software Tools And AI-Driven Test & Measurement Equipment at the 2020 Virtual DAC</title> <published>2020-07-16T12:00:00Z</published> <updated>2024-11-24T22:05:31Z</updated> <link rel="alternate" href="https://www.globenewswire.com/news-release/2020/07/16/2063290/0/en/ProPlus-Electronics-Will-Demonstrate-The-Fastest-EDA-Software-Tools-And-AI-Driven-Test-Measurement-Equipment-at-the-2020-Virtual-DAC.html" /> <content type="html"><![CDATA[<p align="justify">SAN JOSE, Calif., July 16, 2020 (GLOBE NEWSWIRE) -- At virtual DAC 2020, ProPlus Electronics is excited to demonstrate its world-class EDA software tools—the fastest among competitive offerings—and its superior AI-driven Test & Measurement equipment. ProPlus Electronics will proudly showcase its FastSPICE simulation solutions, NanoSpice family; AI-driven automatic SPICE model extraction solution, Spec-Driven Extraction Platform (SDEP); the new all-in-one semiconductor parameter analyzer FS-Pro and updated 1/f noise measurement system 9812DX.<br></p>]]></content> <dc:identifier>2063290</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>ProPlus Electronics Co. Ltd</dc:contributor> <dc:modified>Thu, 16 Jul 2020 12:01 GMT</dc:modified> <media:content medium="image" type="image/jpeg" width="600" url="https://ml.globenewswire.com/Resource/Download/895a2341-d228-46ce-a260-34d4785454b3"> <media:text type="html"><![CDATA[<p> <a href="https://www.globenewswire.com/news-release/2020/07/16/2063290/0/en/ProPlus-Electronics-Will-Demonstrate-The-Fastest-EDA-Software-Tools-And-AI-Driven-Test-Measurement-Equipment-at-the-2020-Virtual-DAC.html"> <img src="https://ml.globenewswire.com/Resource/Download/895a2341-d228-46ce-a260-34d4785454b3" width="600" align="left" border="0" alt="10th year in a row of ProPlus Electronics’ participation in DAC" title="At virtual DAC 2020, ProPlus Electronics is excited to demonstrate its world-class EDA software tools—the fastest among competitive offerings—and its superior AI-driven Test & Measurement equipment" /> </a> </p><br clear="all" />]]></media:text> <media:credit role="publishing company">GlobeNewswire Inc.</media:credit> </media:content> <media:content medium="image" type="image/png" width="600" url="https://ml.globenewswire.com/Resource/Download/27adf6f4-fcd0-4654-b457-e526cfe95794"> <media:text type="html"><![CDATA[<p> <a href="https://www.globenewswire.com/news-release/2020/07/16/2063290/0/en/ProPlus-Electronics-Will-Demonstrate-The-Fastest-EDA-Software-Tools-And-AI-Driven-Test-Measurement-Equipment-at-the-2020-Virtual-DAC.html"> <img src="https://ml.globenewswire.com/Resource/Download/27adf6f4-fcd0-4654-b457-e526cfe95794" width="600" align="left" border="0" alt="ProPlus Line on Display at DAC" title="Fast simulation solutions, NanoSpice family / automatic model extraction solution, SDEP / all-in-one semiconductor parameter analyzer FS-Pro" /> </a> </p><br clear="all" />]]></media:text> <media:credit role="publishing company">GlobeNewswire Inc.</media:credit> </media:content> <dc:subject>Calendar of Events</dc:subject> </entry> <entry> <id>https://www.globenewswire.com/news-release/2017/12/12/1253301/0/en/ProPlus-and-MPI-Corporation-Establish-Strategic-Partnership-Announce-Availability-of-a-Characterization-and-Modeling-Solution.html</id> <title type="text">ProPlus and MPI Corporation Establish Strategic Partnership, Announce Availability of a Characterization and Modeling Solution</title> <published>2017-12-12T16:00:00Z</published> <updated>2024-11-24T22:05:31Z</updated> <link rel="alternate" href="https://www.globenewswire.com/news-release/2017/12/12/1253301/0/en/ProPlus-and-MPI-Corporation-Establish-Strategic-Partnership-Announce-Availability-of-a-Characterization-and-Modeling-Solution.html" /> <content type="html"><![CDATA[Cross-Licensing Agreement Brings Next-Level Wafer-Level Noise Characterization, Enabling High Throughput Measurements with Advanced Probing Technologies <pre>Cross-Licensing Agreement Brings Next-Level Wafer-Level Noise Characterization, Enabling High Throughput Measurements with Advanced Probing Technologies</pre>]]></content> <dc:identifier>1253301</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>ProPlus Design Solutions Inc.</dc:contributor> <dc:modified>Tue, 12 Dec 2017 16:00 GMT</dc:modified> <dc:subject>Company Announcement</dc:subject> </entry> <entry> <id>https://www.globenewswire.com/news-release/2016/11/29/1215509/0/en/ProPlus-Design-Solutions-Sets-New-Standard-for-1-f-Noise-Measurement-Systems.html</id> <title type="text">ProPlus Design Solutions Sets New Standard for 1/f Noise Measurement Systems </title> <published>2016-11-29T15:30:00Z</published> <updated>2024-11-24T22:05:31Z</updated> <link rel="alternate" href="https://www.globenewswire.com/news-release/2016/11/29/1215509/0/en/ProPlus-Design-Solutions-Sets-New-Standard-for-1-f-Noise-Measurement-Systems.html" /> <content type="html"><![CDATA[<p><em><p>Enhanced Version of de Facto Standard 9812D Offers Record Speed, Greater Resolution for all Noise Measurement Needs</p></em></p><p>SAN JOSE, CA--(Marketwired - Nov 29, 2016) - <strong> </strong><a rel="nofollow" href="http://www.proplussolutions.com/" title="ProPlus Design Solutions Inc.">ProPlus Design Solutions Inc.</a> today unveiled 9812DX™ wafer-level 1/f noise characterization system, an enhanced version of its de facto standard 9812D™, setting records for measurement speed, system resolution and coverage of different types of measurement requirements. </p>]]></content> <dc:identifier>1215509</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>ProPlus Design Solutions</dc:contributor> <dc:modified>Fri, 01 Dec 2017 01:53 GMT</dc:modified> </entry> <entry> <id>https://www.globenewswire.com/news-release/2016/09/20/1215505/0/en/Credo-Semiconductor-Turns-to-ProPlus-Design-Solutions-NanoSpice-for-Advanced-SerDes-IP-Designs.html</id> <title type="text">Credo Semiconductor Turns to ProPlus Design Solutions' NanoSpice for Advanced SerDes IP Designs </title> <published>2016-09-20T15:00:00Z</published> <updated>2024-11-24T22:05:31Z</updated> <link rel="alternate" href="https://www.globenewswire.com/news-release/2016/09/20/1215505/0/en/Credo-Semiconductor-Turns-to-ProPlus-Design-Solutions-NanoSpice-for-Advanced-SerDes-IP-Designs.html" /> <content type="html"><![CDATA[<p><em><p>NanoSpice Selected for Speed, and High Accuracy to Simulate Large Designs</p></em></p><p>SAN JOSE, CA--(Marketwired - Sep 20, 2016) - <a rel="nofollow" href="http://www.credosemi.com/" title="Credo Semiconductor">Credo Semiconductor</a>, a global innovation leader in Serializer-Deserializer (SerDes) technology, integrated NanoSpice™, a high-performance parallel SPICE simulator from <a rel="nofollow" href="http://www.proplussolutions.com/" title="ProPlus Design Solutions, Inc.">ProPlus Design Solutions, Inc.</a>, into its advanced SerDes transceiver intellectual property (IP) design and verification flow.</p>]]></content> <dc:identifier>1215505</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>ProPlus Design Solutions</dc:contributor> <dc:modified>Fri, 01 Dec 2017 01:53 GMT</dc:modified> </entry> <entry> <id>https://www.globenewswire.com/news-release/2016/09/13/1215506/0/en/MEDIA-ALERT-ProPlus-Design-Solutions-to-Exhibit-at-TSMC-OIP-Ecosystem-Forum-R.html</id> <title type="text">MEDIA ALERT: ProPlus Design Solutions to Exhibit at TSMC OIP Ecosystem Forum(R) </title> <published>2016-09-13T15:00:00Z</published> <updated>2024-11-24T22:05:31Z</updated> <link rel="alternate" href="https://www.globenewswire.com/news-release/2016/09/13/1215506/0/en/MEDIA-ALERT-ProPlus-Design-Solutions-to-Exhibit-at-TSMC-OIP-Ecosystem-Forum-R.html" /> <content type="html"><![CDATA[<p><em><p>Will Demonstrate Giga-Scale Simulators, Nano-Scale SPICE Modeling Solutions</p></em></p><p>SAN JOSE, CA--(Marketwired - Sep 13, 2016) - </p>]]></content> <dc:identifier>1215506</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>ProPlus Design Solutions</dc:contributor> <dc:modified>Fri, 01 Dec 2017 01:53 GMT</dc:modified> </entry> <entry> <id>https://www.globenewswire.com/news-release/2016/05/31/1215502/0/en/REMINDER-MEDIA-ALERT-ProPlus-Design-Solutions-to-Exhibit-at-DAC.html</id> <title type="text">REMINDER: MEDIA ALERT: ProPlus Design Solutions to Exhibit at DAC </title> <published>2016-05-31T15:00:00Z</published> <updated>2024-11-24T22:05:31Z</updated> <link rel="alternate" href="https://www.globenewswire.com/news-release/2016/05/31/1215502/0/en/REMINDER-MEDIA-ALERT-ProPlus-Design-Solutions-to-Exhibit-at-DAC.html" /> <content type="html"><![CDATA[<p><em><p>Will Demo Giga-Scale SPICE Simulators, Design-Assistant Tool for Process and Device Evaluation</p></em></p><p>SAN JOSE, CA--(Marketwired - May 31, 2016) - </p>]]></content> <dc:identifier>1215502</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>ProPlus Design Solutions</dc:contributor> <dc:modified>Fri, 01 Dec 2017 01:53 GMT</dc:modified> </entry> <entry> <id>https://www.globenewswire.com/news-release/2016/05/26/1215500/0/en/MEDIA-ALERT-ProPlus-Design-Solutions-to-Exhibit-at-DAC.html</id> <title type="text">MEDIA ALERT: ProPlus Design Solutions to Exhibit at DAC </title> <published>2016-05-26T15:00:00Z</published> <updated>2024-11-24T22:05:31Z</updated> <link rel="alternate" href="https://www.globenewswire.com/news-release/2016/05/26/1215500/0/en/MEDIA-ALERT-ProPlus-Design-Solutions-to-Exhibit-at-DAC.html" /> <content type="html"><![CDATA[<p><em><p>Will Demo Giga-Scale SPICE Simulators, Design-Assistant Tool for Process and Device Evaluation</p></em></p><p>SAN JOSE, CA--(Marketwired - May 26, 2016) - </p>]]></content> <dc:identifier>1215500</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>ProPlus Design Solutions</dc:contributor> <dc:modified>Fri, 01 Dec 2017 01:53 GMT</dc:modified> </entry> <entry> <id>https://www.globenewswire.com/news-release/2016/05/24/1215496/0/en/UltraMemory-Turns-to-NanoSpice-NanoSpice-Giga-From-ProPlus-Design-Solutions-for-Design-of-Super-Broadband-Large-Scale-Memory.html</id> <title type="text">UltraMemory Turns to NanoSpice, NanoSpice Giga From ProPlus Design Solutions for Design of Super-Broadband, Large-Scale Memory </title> <published>2016-05-24T15:00:00Z</published> <updated>2024-11-24T22:05:31Z</updated> <link rel="alternate" href="https://www.globenewswire.com/news-release/2016/05/24/1215496/0/en/UltraMemory-Turns-to-NanoSpice-NanoSpice-Giga-From-ProPlus-Design-Solutions-for-Design-of-Super-Broadband-Large-Scale-Memory.html" /> <content type="html"><![CDATA[<p><em><p>Full Circuit Simulation Solutions Replaced Other Simulators for Small Block, Full-Chip Memory Designs</p></em></p><p>SAN JOSE, CA--(Marketwired - May 24, 2016) - <a rel="nofollow" href="http://www.jedat.co.jp/" title="UltraMemory Inc.">UltraMemory Inc.</a> (UltraMemory) has selected NanoSpice™ and NanoSpice Giga™ from <a rel="nofollow" href="http://www.proplussolutions.com/" title="ProPlus Design Solutions, Inc.">ProPlus Design Solutions, Inc.</a>, the leading technology provider of giga-scale parallel SPICE simulation, SPICE modeling solutions and Design-for-Yield (DFY) applications, to simulate its super-broadband, super large-scale memory design.</p>]]></content> <dc:identifier>1215496</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>ProPlus Design Solutions</dc:contributor> <dc:modified>Fri, 01 Dec 2017 01:53 GMT</dc:modified> </entry> <entry> <id>https://www.globenewswire.com/news-release/2016/05/17/1215499/0/en/UMC-Adopts-ProPlus-Design-Solutions-9812D-1-f-Noise-Characterization-System.html</id> <title type="text">UMC Adopts ProPlus Design Solutions' 9812D 1/f Noise Characterization System </title> <published>2016-05-17T15:00:00Z</published> <updated>2024-11-24T22:05:31Z</updated> <link rel="alternate" href="https://www.globenewswire.com/news-release/2016/05/17/1215499/0/en/UMC-Adopts-ProPlus-Design-Solutions-9812D-1-f-Noise-Characterization-System.html" /> <content type="html"><![CDATA[<p><em><p>9812D Selected for Technology Development at 28nm, 14nm and Beyond</p></em></p><p>SAN JOSE, CA--(Marketwired - May 17, 2016) - <a rel="nofollow" href="http://www.proplussolutions.com/" title="ProPlus Design Solutions Inc.">ProPlus Design Solutions Inc.</a> today announced that <a rel="nofollow" href="http://www.umc.com/" title="United Microelectronics Corporation">United Microelectronics Corporation</a> (<exchange name="NYSE">NYSE</exchange>: <ticker name="UMC">UMC</ticker>) (<exchange name="TWSE">TWSE</exchange>: <ticker name="2303">2303</ticker>) ("UMC"), a leading global semiconductor foundry, has adopted its 9812D wafer-level 1/f noise characterization system.</p>]]></content> <dc:identifier>1215499</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>ProPlus Design Solutions</dc:contributor> <dc:modified>Fri, 01 Dec 2017 01:53 GMT</dc:modified> </entry> <entry> <id>https://www.globenewswire.com/news-release/2016/03/29/1215494/0/en/REMINDER-MEDIA-ALERT-ProPlus-Design-Solutions-to-Offer-Webinar-Highlighting-New-Tool-for-Process-Device-Evaluation.html</id> <title type="text">REMINDER: MEDIA ALERT: ProPlus Design Solutions to Offer Webinar Highlighting New Tool for Process, Device Evaluation </title> <published>2016-03-29T15:30:00Z</published> <updated>2024-11-24T22:05:31Z</updated> <link rel="alternate" href="https://www.globenewswire.com/news-release/2016/03/29/1215494/0/en/REMINDER-MEDIA-ALERT-ProPlus-Design-Solutions-to-Offer-Webinar-Highlighting-New-Tool-for-Process-Device-Evaluation.html" /> <content type="html"><![CDATA[<p><em><p>MEPro Bridges Process Development, CAD, Circuit Design for Systematic Evaluation of Device or Circuit-Level Performance Targets</p></em></p><p>SAN JOSE, CA--(Marketwired - Mar 29, 2016) - </p>]]></content> <dc:identifier>1215494</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>ProPlus Design Solutions</dc:contributor> <dc:modified>Fri, 01 Dec 2017 01:53 GMT</dc:modified> </entry> <entry> <id>https://www.globenewswire.com/news-release/2016/03/16/1215491/0/en/MEDIA-ALERT-ProPlus-Design-Solutions-to-Offer-Webinar-Highlighting-New-Tool-for-Process-Device-Evaluation.html</id> <title type="text">MEDIA ALERT: ProPlus Design Solutions to Offer Webinar Highlighting New Tool for Process, Device Evaluation </title> <published>2016-03-16T15:30:00Z</published> <updated>2024-11-24T22:05:31Z</updated> <link rel="alternate" href="https://www.globenewswire.com/news-release/2016/03/16/1215491/0/en/MEDIA-ALERT-ProPlus-Design-Solutions-to-Offer-Webinar-Highlighting-New-Tool-for-Process-Device-Evaluation.html" /> <content type="html"><![CDATA[<p><em><p>MEPro Bridges Process Development, CAD, Circuit Design for Systematic Evaluation of Device or Circuit-Level Performance Targets</p></em></p><p>SAN JOSE, CA--(Marketwired - Mar 16, 2016) - </p>]]></content> <dc:identifier>1215491</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>ProPlus Design Solutions</dc:contributor> <dc:modified>Fri, 01 Dec 2017 01:53 GMT</dc:modified> </entry> <entry> <id>https://www.globenewswire.com/news-release/2016/03/08/1215488/0/en/ProPlus-Design-Solutions-to-Demonstrate-Giga-Scale-SPICE-Simulation-Solutions-at-TSMC-2016-Technology-Symposia-in-North-America.html</id> <title type="text">ProPlus Design Solutions to Demonstrate Giga-Scale SPICE Simulation Solutions at TSMC 2016 Technology Symposia in North America </title> <published>2016-03-08T16:00:00Z</published> <updated>2024-11-24T22:05:31Z</updated> <link rel="alternate" href="https://www.globenewswire.com/news-release/2016/03/08/1215488/0/en/ProPlus-Design-Solutions-to-Demonstrate-Giga-Scale-SPICE-Simulation-Solutions-at-TSMC-2016-Technology-Symposia-in-North-America.html" /> <content type="html"><![CDATA[<p><em><p>Will Also Highlight New MEPro Tool for Process, Device Evaluation</p></em></p><p>SAN JOSE, CA--(Marketwired - Mar 8, 2016) - <a rel="nofollow" href="http://www.proplussolutions.com/" title="ProPlus Design Solutions, Inc.">ProPlus Design Solutions, Inc.</a>, the leading SPICE modeling, giga-scale SPICE simulation and design for yield (DFY) solution provider, will demonstrate its giga-scale SPICE simulators and new process and device evaluation tool during TSMC 2016 Technology Symposia this month.</p>]]></content> <dc:identifier>1215488</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>ProPlus Design Solutions</dc:contributor> <dc:modified>Fri, 01 Dec 2017 01:53 GMT</dc:modified> </entry> <entry> <id>https://www.globenewswire.com/news-release/2016/03/08/1215490/0/en/Silicon-Creations-Adopts-ProPlus-Design-Solutions-NanoSpice-to-Simulate-SerDes-IP.html</id> <title type="text">Silicon Creations Adopts ProPlus Design Solutions' NanoSpice to Simulate SerDes IP </title> <published>2016-03-08T16:00:00Z</published> <updated>2024-11-24T22:05:31Z</updated> <link rel="alternate" href="https://www.globenewswire.com/news-release/2016/03/08/1215490/0/en/Silicon-Creations-Adopts-ProPlus-Design-Solutions-NanoSpice-to-Simulate-SerDes-IP.html" /> <content type="html"><![CDATA[<p><em><p>Unique Economic Factors Boost Simulation Performance, Throughput for SerDes Designs at 28nm, 16nm, 10nm</p></em></p><p>SAN JOSE, CA--(Marketwired - Mar 8, 2016) - <a rel="nofollow" href="http://www.siliconcr.com/" title="Silicon Creations">Silicon Creations</a>, supplier of high-performance semi-custom analog and mixed-signal intellectual property (IP), confirmed today it has deployed NanoSpice™, a high-performance parallel SPICE simulator from <a rel="nofollow" href="http://www.proplussolutions.com/" title="ProPlus Design Solutions, Inc.">ProPlus Design Solutions, Inc.</a>, to simulate its SerDes interface IP designs.</p>]]></content> <dc:identifier>1215490</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>ProPlus Design Solutions</dc:contributor> <dc:modified>Fri, 01 Dec 2017 01:53 GMT</dc:modified> </entry> <entry> <id>https://www.globenewswire.com/news-release/2015/09/17/1215483/0/en/REMINDER-MEDIA-ALERT-ProPlus-Design-Solutions-to-Exhibit-at-TSMC-OIP-Ecosystem-Forum.html</id> <title type="text">REMINDER: MEDIA ALERT - ProPlus Design Solutions to Exhibit at TSMC OIP Ecosystem Forum </title> <published>2015-09-17T15:00:00Z</published> <updated>2024-11-24T22:05:31Z</updated> <link rel="alternate" href="https://www.globenewswire.com/news-release/2015/09/17/1215483/0/en/REMINDER-MEDIA-ALERT-ProPlus-Design-Solutions-to-Exhibit-at-TSMC-OIP-Ecosystem-Forum.html" /> <content type="html"><![CDATA[<p><em><p>Will Demonstrate NanoSpice Giga Simulator for Memory Verification, New Nano Design Environment for Process Platform Benchmark</p></em></p><p>SAN JOSE, CA--(Marketwired - Sep 17, 2015) - </p>]]></content> <dc:identifier>1215483</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>ProPlus Design Solutions</dc:contributor> <dc:modified>Fri, 01 Dec 2017 01:53 GMT</dc:modified> </entry> <entry> <id>https://www.globenewswire.com/news-release/2015/09/16/1215479/0/en/MEDIA-ALERT-ProPlus-Design-Solutions-to-Exhibit-at-TSMC-OIP-Ecosystem-Forum.html</id> <title type="text">MEDIA ALERT: ProPlus Design Solutions to Exhibit at TSMC OIP Ecosystem Forum </title> <published>2015-09-16T15:00:00Z</published> <updated>2024-11-24T22:05:31Z</updated> <link rel="alternate" href="https://www.globenewswire.com/news-release/2015/09/16/1215479/0/en/MEDIA-ALERT-ProPlus-Design-Solutions-to-Exhibit-at-TSMC-OIP-Ecosystem-Forum.html" /> <content type="html"><![CDATA[<p><em><p>Will Demonstrate NanoSpice Giga Simulator for Memory Verification, New Nano Design Environment for Process Platform Benchmark</p></em></p><p>SAN JOSE, CA--(Marketwired - Sep 16, 2015) - </p>]]></content> <dc:identifier>1215479</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>ProPlus Design Solutions</dc:contributor> <dc:modified>Fri, 01 Dec 2017 01:53 GMT</dc:modified> </entry> <entry> <id>https://www.globenewswire.com/news-release/2015/09/15/1215475/0/en/ProPlus-Design-Solutions-Unveils-Innovative-Design-Environment-to-Bridge-Circuit-Design-CAD-and-Process-Development.html</id> <title type="text">ProPlus Design Solutions Unveils Innovative Design Environment to Bridge Circuit Design, CAD and Process Development </title> <published>2015-09-15T15:00:00Z</published> <updated>2024-11-24T22:05:31Z</updated> <link rel="alternate" href="https://www.globenewswire.com/news-release/2015/09/15/1215475/0/en/ProPlus-Design-Solutions-Unveils-Innovative-Design-Environment-to-Bridge-Circuit-Design-CAD-and-Process-Development.html" /> <content type="html"><![CDATA[<p><em><p>Offers Unique Capabilities for SPICE Model Exploration, Validation and Process Platform Benchmarking</p></em></p><p>SAN JOSE, CA--(Marketwired - Sep 15, 2015) - <strong> </strong><a rel="nofollow" href="http://www.proplussolutions.com/" title="ProPlus Design Solutions, Inc.">ProPlus Design Solutions, Inc.</a> today unveiled MEPro™, within its own Nano Design Environment™ (NDE), that bridges circuit design, CAD and process development, and lets designers quickly adopt and make full use of a process platform.</p>]]></content> <dc:identifier>1215475</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>ProPlus Design Solutions</dc:contributor> <dc:modified>Fri, 01 Dec 2017 01:53 GMT</dc:modified> </entry> <entry> <id>https://www.globenewswire.com/news-release/2015/07/21/1215471/0/en/eSilicon-Selects-ProPlus-Design-Solutions-High-Performance-Parallel-SPICE-Simulator-and-Variation-Analysis-Platform.html</id> <title type="text">eSilicon Selects ProPlus Design Solutions' High-Performance Parallel SPICE Simulator and Variation Analysis Platform </title> <published>2015-07-21T15:00:00Z</published> <updated>2024-11-24T22:05:31Z</updated> <link rel="alternate" href="https://www.globenewswire.com/news-release/2015/07/21/1215471/0/en/eSilicon-Selects-ProPlus-Design-Solutions-High-Performance-Parallel-SPICE-Simulator-and-Variation-Analysis-Platform.html" /> <content type="html"><![CDATA[<p><em><p>NanoSpice, NanoYield Implemented Into eSilicon's Advanced Design Flow for 28/16nm Designs</p></em></p><p>SAN JOSE, CA--(Marketwired - Jul 21, 2015) - <a rel="nofollow" href="http://www.proplussolutions.com/" title="ProPlus Design Solutions, Inc.">ProPlus Design Solutions, Inc.</a> today announced that <a rel="nofollow" href="http://www.esilicon.com/?utm_source=pr&utm_medium=proplus&utm_campaign=proplus-nanospice-201507" title="eSilicon Corporation">eSilicon Corporation</a>, a leading independent semiconductor design and manufacturing solutions provider, has selected its high-performance parallel SPICE simulator and its variation analysis platform for advanced intellectual property (IP) designs at 28-nanometer (nm), 16nm and beyond.</p>]]></content> <dc:identifier>1215471</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>ProPlus Design Solutions</dc:contributor> <dc:modified>Fri, 01 Dec 2017 01:53 GMT</dc:modified> </entry> <entry> <id>https://www.globenewswire.com/news-release/2015/06/04/1215468/0/en/ProPlus-Design-Solutions-Partners-With-Runtime-Design-Automation-and-Zentera-Systems-to-Demonstrate-SPICE-Simulation-and-Design-For-Yield-Tools-in-the-Cloud-During-DAC.html</id> <title type="text">ProPlus Design Solutions Partners With Runtime Design Automation and Zentera Systems to Demonstrate SPICE Simulation and Design For Yield Tools in the Cloud During DAC </title> <published>2015-06-04T15:00:00Z</published> <updated>2024-11-24T22:05:31Z</updated> <link rel="alternate" href="https://www.globenewswire.com/news-release/2015/06/04/1215468/0/en/ProPlus-Design-Solutions-Partners-With-Runtime-Design-Automation-and-Zentera-Systems-to-Demonstrate-SPICE-Simulation-and-Design-For-Yield-Tools-in-the-Cloud-During-DAC.html" /> <content type="html"><![CDATA[<p><em><p>Demo Will Highlight How Design Teams Can Maximize Compute Capacity for Highly Scalable SPICE Simulations in the Cloud</p></em></p><p>SAN JOSE, CA--(Marketwired - Jun 4, 2015) - <a rel="nofollow" href="http://www.proplussolutions.com/" title="ProPlus Design Solutions, Inc.">ProPlus Design Solutions, Inc.</a>, has partnered with <a rel="nofollow" href="http://www.rtda.com/" title="Runtime Design Automation">Runtime Design Automation</a> (RTDA) and <a rel="nofollow" href="http://www.zentera.net/" title="Zentera Systems Inc.">Zentera Systems Inc.</a> to demonstrate its SPICE simulation and design for field (DFY) software in the cloud at the 52nd <a rel="nofollow" href="http://www.dac.com/" title="Design Automation Conference">Design Automation Conference</a> (DAC). </p>]]></content> <dc:identifier>1215468</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>ProPlus Design Solutions</dc:contributor> <dc:modified>Fri, 01 Dec 2017 01:53 GMT</dc:modified> </entry> <entry> <id>https://www.globenewswire.com/news-release/2015/05/26/1215466/0/en/Memory-Designers-Choose-NanoSpice-Giga-Simulator-From-ProPlus-Design-Solutions.html</id> <title type="text">Memory Designers Choose NanoSpice Giga Simulator From ProPlus Design Solutions </title> <published>2015-05-26T15:00:00Z</published> <updated>2024-11-24T22:05:31Z</updated> <link rel="alternate" href="https://www.globenewswire.com/news-release/2015/05/26/1215466/0/en/Memory-Designers-Choose-NanoSpice-Giga-Simulator-From-ProPlus-Design-Solutions.html" /> <content type="html"><![CDATA[<p><em><p>NanoSpice Giga Replaces FastSPICE for High Accuracy to Manage Giga-Scale Design Challenges</p></em></p><p>SAN JOSE, CA--(Marketwired - May 26, 2015) - NanoSpice Giga™, the high-capacity, high-performance parallel GigaSpice simulator from <a rel="nofollow" href="http://www.proplussolutions.com/" title="ProPlus Design Solutions, Inc.">ProPlus Design Solutions, Inc.</a>, is realizing widespread adoption by leading memory designers worldwide. </p>]]></content> <dc:identifier>1215466</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>ProPlus Design Solutions</dc:contributor> <dc:modified>Fri, 01 Dec 2017 01:53 GMT</dc:modified> </entry> </feed>