<?xml version="1.0" encoding="utf-8"?> <rss version="2.0"> <channel xmlns:dc="http://dublincore.org/documents/dcmi-namespace/" xmlns:media="http://search.yahoo.com/mrss/"> <title>Cain Communications</title> <link>https://www.globenewswire.com/rssfeed/organization/y_EcSW81u4kEKhTI_UZX6w==</link> <description>Contains the last 20 releases</description> <copyright>Copyright 2017, Cain Communications</copyright> <managingEditor>newsdesk@globenewswire.com (NewsDesk)</managingEditor> <lastBuildDate>Wed, 05 Apr 2017 13:00:00 GMT</lastBuildDate> <webMaster>webmaster@globenewswire.com (Webmaster)</webMaster> <item> <guid isPermaLink="true">https://www.globenewswire.com/news-release/2017/04/05/1376406/0/en/Solar-Antenna-technology-from-NovaSolix-Twice-as-efficient-and-80-less-expensive-than-photo-voltaic-technology.html</guid> <link>https://www.globenewswire.com/news-release/2017/04/05/1376406/0/en/Solar-Antenna-technology-from-NovaSolix-Twice-as-efficient-and-80-less-expensive-than-photo-voltaic-technology.html</link> <title>Solar Antenna technology from NovaSolix: Twice as efficient and 80% less expensive than photo-voltaic technology</title> <description><![CDATA[<p><span class="mw_region">PALO ALTO, CA</span><span>--(Marketwired - April 05, 2017) - </span>NovaSolix today announced the NovaSolix Solar Antenna technology, a disruptive technology enabling solar energy to expand beyond the inherent limitations of photo-voltaic (PV) cells. The NovaSolix Solar Antenna technology converts a much broader spectrum of light waves to electricity than PV through the use of miniature carbon nanotube (CNT) antennas. Prototypes will be available Q4 2017.</p>]]></description> <pubDate>Wed, 05 Apr 2017 13:00 GMT</pubDate> <dc:identifier>1376406</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>NovaSolix</dc:contributor> <dc:modified>Thu, 22 Feb 2018 04:49 GMT</dc:modified> </item> <item> <guid isPermaLink="true">https://www.globenewswire.com/news-release/2016/08/24/1376404/0/en/eSilicon-to-Present-at-Cadence-CDNLive-Boston-2016-Conference.html</guid> <link>https://www.globenewswire.com/news-release/2016/08/24/1376404/0/en/eSilicon-to-Present-at-Cadence-CDNLive-Boston-2016-Conference.html</link> <title>eSilicon to Present at Cadence CDNLive Boston 2016 Conference</title> <description><![CDATA[<p><span class="mw_region">SAN JOSE, CA</span><span>--(Marketwired - August 24, 2016) - </span>eSilicon, a leading semiconductor design and manufacturing solutions provider, will present at the CDNLive Boston 2016 Conference in Burlington, MA.</p>]]></description> <pubDate>Wed, 24 Aug 2016 12:00 GMT</pubDate> <dc:identifier>1376404</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>eSilicon</dc:contributor> <dc:modified>Thu, 22 Feb 2018 04:49 GMT</dc:modified> </item> <item> <guid isPermaLink="true">https://www.globenewswire.com/news-release/2016/04/19/1376474/0/en/SK-Hynix-Amkor-Technology-eSilicon-Northwest-Logic-and-Avery-Design-Systems-Announce-New-HBM-White-Paper-Start-Your-HBM-2-5D-Design-Today.html</guid> <link>https://www.globenewswire.com/news-release/2016/04/19/1376474/0/en/SK-Hynix-Amkor-Technology-eSilicon-Northwest-Logic-and-Avery-Design-Systems-Announce-New-HBM-White-Paper-Start-Your-HBM-2-5D-Design-Today.html</link> <title>SK Hynix, Amkor Technology, eSilicon, Northwest Logic and Avery Design Systems Announce New HBM White Paper: "Start Your HBM/2.5D Design Today" </title> <description><![CDATA[<p><em><p>White Paper Explains a Real, Working HBM/2.5D Supply Chain</p></em></p><p>SAN JOSE, CA--(Marketwired - Apr 19, 2016) - <strong> </strong>SK Hynix, Amkor Technology, eSilicon, Northwest Logic and Avery Design Systems have co-authored a white paper discussing High Bandwidth Memory (HBM) designs implemented with 2.5D technology. </p>]]></description> <pubDate>Tue, 19 Apr 2016 12:00 GMT</pubDate> <dc:identifier>1376474</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>eSilicon</dc:contributor> <dc:modified>Thu, 22 Feb 2018 04:49 GMT</dc:modified> </item> <item> <guid isPermaLink="true">https://www.globenewswire.com/news-release/2016/04/14/1376472/0/en/eSilicon-CEO-Jack-Harding-to-Participate-in-Global-Semiconductor-Alliance-CEO-Panel-What-s-next.html</guid> <link>https://www.globenewswire.com/news-release/2016/04/14/1376472/0/en/eSilicon-CEO-Jack-Harding-to-Participate-in-Global-Semiconductor-Alliance-CEO-Panel-What-s-next.html</link> <title>eSilicon CEO Jack Harding to Participate in Global Semiconductor Alliance CEO Panel "What's next" </title> <description><![CDATA[<p>SAN JOSE, CA--(Marketwired - Apr 14, 2016) - Led by Dr. Aart de Geus, chairman and co-CEO of Synopsys, a panel of CEOs will answer the question, "What's next?" at the GSA European Executive Forum on April 19, 2016 in Munich, Germany.</p>]]></description> <pubDate>Thu, 14 Apr 2016 12:00 GMT</pubDate> <dc:identifier>1376472</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>eSilicon</dc:contributor> <dc:modified>Thu, 22 Feb 2018 04:49 GMT</dc:modified> </item> <item> <guid isPermaLink="true">https://www.globenewswire.com/news-release/2016/03/22/1376470/0/en/GL-Communications-Inc-Selects-Achronix-Speedster22i-FPGAs-for-10-40-100G-PacketExpert-TM.html</guid> <link>https://www.globenewswire.com/news-release/2016/03/22/1376470/0/en/GL-Communications-Inc-Selects-Achronix-Speedster22i-FPGAs-for-10-40-100G-PacketExpert-TM.html</link> <title>GL Communications Inc. Selects Achronix Speedster22i FPGAs for 10/40/100G PacketExpert(TM) </title> <description><![CDATA[<p>SANTA CLARA, CA--(Marketwired - Mar 22, 2016) - Achronix Semiconductor Corporation today announced that GL Communications Inc. selected the Achronix Speedster22i HD1000 FPGA for its 10/40/100G PacketExpert™ Ethernet tester, a hardware-based test instrument suited for the installation, troubleshooting and comprehensive testing of Ethernet/IP networks. </p>]]></description> <pubDate>Tue, 22 Mar 2016 13:00 GMT</pubDate> <dc:identifier>1376470</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>Achronix Semiconductor Corp.</dc:contributor> <dc:modified>Thu, 22 Feb 2018 04:49 GMT</dc:modified> </item> <item> <guid isPermaLink="true">https://www.globenewswire.com/news-release/2016/03/16/1376467/0/en/indie-Semiconductor-Announces-Certification-of-World-s-Smallest-USB-C-E-Marker-Chip.html</guid> <link>https://www.globenewswire.com/news-release/2016/03/16/1376467/0/en/indie-Semiconductor-Announces-Certification-of-World-s-Smallest-USB-C-E-Marker-Chip.html</link> <title>indie Semiconductor Announces Certification of World's Smallest USB-C E-Marker Chip </title> <description><![CDATA[<p>ALISO VIEJO, CA--(Marketwired - Mar 16, 2016) - indie Semiconductor announced today that the USB Implementers Forum (USB-IF) Compliance Program has certified the new indie iND80001 Lodestar chip as USB-C and USB PD 2.0 compliant. The chip utilizes E-Marker technology to facilitate USB power delivery. At less than 1mm on a side, it is the smallest device available.</p>]]></description> <pubDate>Wed, 16 Mar 2016 12:00 GMT</pubDate> <dc:identifier>1376467</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>eSilicon</dc:contributor> <dc:modified>Thu, 22 Feb 2018 04:49 GMT</dc:modified> <media:content medium="image" type="image/jpeg" width="600" url="http://media.marketwire.com/attachments/201603/30502_indie-lodestar-usb-3-ic-440pxW-20160314copy.jpg"> <media:text type="html"><![CDATA[<p> <a href="https://www.globenewswire.com/news-release/2016/03/16/1376467/0/en/indie-Semiconductor-Announces-Certification-of-World-s-Smallest-USB-C-E-Marker-Chip.html"> <img src="http://media.marketwire.com/attachments/201603/30502_indie-lodestar-usb-3-ic-440pxW-20160314copy.jpg" width="600" align="left" border="0" alt="Photo" title="indie iND80001 Lodestar chip" /> </a> </p><br clear="all" />]]></media:text> <media:credit role="publishing company">GlobeNewswire Inc.</media:credit> </media:content> </item> <item> <guid isPermaLink="true">https://www.globenewswire.com/news-release/2016/03/15/1376462/0/en/Synapse-Design-Opens-Office-in-Vietnam.html</guid> <link>https://www.globenewswire.com/news-release/2016/03/15/1376462/0/en/Synapse-Design-Opens-Office-in-Vietnam.html</link> <title>Synapse Design Opens Office in Vietnam </title> <description><![CDATA[<p><em><p>Synapse Design to Tap Into Thriving Engineering Community</p></em></p><p>SAN JOSE, CA--(Marketwired - Mar 15, 2016) - Synapse Design, the leading design services partner serving tier one system and semiconductor companies, today announced that it is opening its new flagship office in Ho Chi Minh City, Vietnam. The Synapse Design Vietnam offices will provide engineering services to its existing tier one customers.</p>]]></description> <pubDate>Tue, 15 Mar 2016 13:00 GMT</pubDate> <dc:identifier>1376462</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>Synapse Design</dc:contributor> <dc:modified>Thu, 22 Feb 2018 04:49 GMT</dc:modified> <dc:keyword>SOC</dc:keyword> <dc:keyword>ASIC</dc:keyword> <dc:keyword>analog</dc:keyword> <dc:keyword>mixed-signal</dc:keyword> <dc:keyword>high-end products</dc:keyword> <dc:keyword>complex ASIC</dc:keyword> <dc:keyword>semiconductor</dc:keyword> <dc:keyword>design service</dc:keyword> </item> <item> <guid isPermaLink="true">https://www.globenewswire.com/news-release/2016/03/15/1376464/0/en/SK-Hynix-Amkor-Technology-eSilicon-Northwest-Logic-and-Avery-Design-Systems-Announce-Start-Your-HBM-2-5D-Design-Today-Webinar.html</guid> <link>https://www.globenewswire.com/news-release/2016/03/15/1376464/0/en/SK-Hynix-Amkor-Technology-eSilicon-Northwest-Logic-and-Avery-Design-Systems-Announce-Start-Your-HBM-2-5D-Design-Today-Webinar.html</link> <title>SK Hynix, Amkor Technology, eSilicon, Northwest Logic and Avery Design Systems Announce "Start Your HBM/2.5D Design Today" Webinar </title> <description><![CDATA[<p><em><p>Webinar Will Bring Content From Recent Seminar to a Worldwide Audience</p></em></p><p>SAN JOSE, CA--(Marketwired - Mar 15, 2016) - SK Hynix, Amkor Technology, eSilicon, Northwest Logic and Avery Design Systems recently presented a live seminar in the Bay Area discussing High Bandwidth Memory (HBM) designs implemented with 2.5D technology. The event was very well received, with over 100 people in attendance. The five companies are now bringing this HBM information to a worldwide audience with two webinars on Tuesday, March 29, 2016. The two live webinar events will occur at 8:00 AM and 6:00 PM Pacific Daylight Time.</p>]]></description> <pubDate>Tue, 15 Mar 2016 12:00 GMT</pubDate> <dc:identifier>1376464</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>eSilicon</dc:contributor> <dc:modified>Thu, 22 Feb 2018 04:49 GMT</dc:modified> </item> <item> <guid isPermaLink="true">https://www.globenewswire.com/news-release/2016/03/09/1376459/0/en/eSilicon-to-Attend-GOMACTech-2016-Conference-More-Than-Moore-and-Beyond.html</guid> <link>https://www.globenewswire.com/news-release/2016/03/09/1376459/0/en/eSilicon-to-Attend-GOMACTech-2016-Conference-More-Than-Moore-and-Beyond.html</link> <title>eSilicon to Attend GOMACTech 2016 Conference: More Than Moore and Beyond </title> <description><![CDATA[<p>SAN JOSE, CA--(Marketwired - Mar 9, 2016) - eSilicon, a leading semiconductor design and manufacturing solutions provider, will participate at the 41<sup>st</sup> annual Government Microcircuit Applications & Critical Technology (GOMACTech) Conference in Orlando, Florida. </p>]]></description> <pubDate>Wed, 09 Mar 2016 14:00 GMT</pubDate> <dc:identifier>1376459</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>eSilicon</dc:contributor> <dc:modified>Thu, 22 Feb 2018 04:49 GMT</dc:modified> </item> <item> <guid isPermaLink="true">https://www.globenewswire.com/news-release/2016/03/07/1376458/0/en/Sidense-Exhibiting-at-TSMC-2016-North-American-Technology-Symposiums.html</guid> <link>https://www.globenewswire.com/news-release/2016/03/07/1376458/0/en/Sidense-Exhibiting-at-TSMC-2016-North-American-Technology-Symposiums.html</link> <title>Sidense Exhibiting at TSMC 2016 North American Technology Symposiums </title> <description><![CDATA[<p>OTTAWA, ON and SAN JOSE, CA--(Marketwired - Mar 7, 2016) - </p>]]></description> <pubDate>Mon, 07 Mar 2016 14:00 GMT</pubDate> <dc:identifier>1376458</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>Sidense</dc:contributor> <dc:modified>Thu, 22 Feb 2018 04:49 GMT</dc:modified> </item> <item> <guid isPermaLink="true">https://www.globenewswire.com/news-release/2016/02/04/1376456/0/en/SK-hynix-Inc-Amkor-Technology-Inc-eSilicon-Northwest-Logic-and-Avery-Design-Systems-Announce-Start-your-HBM-2-5D-Design-Today-Seminar.html</guid> <link>https://www.globenewswire.com/news-release/2016/02/04/1376456/0/en/SK-hynix-Inc-Amkor-Technology-Inc-eSilicon-Northwest-Logic-and-Avery-Design-Systems-Announce-Start-your-HBM-2-5D-Design-Today-Seminar.html</link> <title>SK hynix, Inc., Amkor Technology, Inc., eSilicon, Northwest Logic and Avery Design Systems Announce "Start your HBM/2.5D Design Today" Seminar </title> <description><![CDATA[<p><em><p>Seminar Will Present a Complete HBM Supply Chain Solution</p></em></p><p>SAN JOSE, CA--(Marketwired - Feb 4, 2016) - SK hynix, Inc. ("SK hynix"), Amkor Technology, Inc., eSilicon, Northwest Logic and Avery Design Systems have joined forces to offer a complete High Bandwidth Memory (HBM) supply chain solution. HBM is a JEDEC-defined standard that utilizes 2.5D technology to interconnect a SoC and a HBM memory stack. Many companies are already using HBM to create very high-bandwidth, low-power products. This seminar will present a complete HBM supply chain that is delivering and supporting customer HBM designs now. </p>]]></description> <pubDate>Thu, 04 Feb 2016 14:00 GMT</pubDate> <dc:identifier>1376456</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>eSilicon</dc:contributor> <dc:modified>Thu, 22 Feb 2018 04:49 GMT</dc:modified> </item> <item> <guid isPermaLink="true">https://www.globenewswire.com/news-release/2016/01/21/1376454/0/en/Sidense-Hires-Industry-Veteran-Ken-Wagner-as-Senior-VP-Engineering.html</guid> <link>https://www.globenewswire.com/news-release/2016/01/21/1376454/0/en/Sidense-Hires-Industry-Veteran-Ken-Wagner-as-Senior-VP-Engineering.html</link> <title>Sidense Hires Industry Veteran Ken Wagner as Senior VP Engineering </title> <description><![CDATA[<p>OTTAWA, ON--(Marketwired - Jan 21, 2016) - Sidense Corp., a leading developer of Non-Volatile Memory (NVM) One Time Programmable (OTP) IP cores, today announced that Ken Wagner has joined Sidense as the Company's Senior Vice President of Engineering. Ken will be reporting to Sidense President and CEO Xerxes Wania and will assume responsibility for all of Sidense's engineering activities.</p>]]></description> <pubDate>Thu, 21 Jan 2016 14:00 GMT</pubDate> <dc:identifier>1376454</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>Sidense</dc:contributor> <dc:modified>Thu, 22 Feb 2018 04:49 GMT</dc:modified> </item> <item> <guid isPermaLink="true">https://www.globenewswire.com/news-release/2015/12/29/1376451/0/en/Sidense-Qualifies-1T-OTP-Memory-IP-at-GLOBALFOUNDRIES-55nm-Low-Power-Process-Node.html</guid> <link>https://www.globenewswire.com/news-release/2015/12/29/1376451/0/en/Sidense-Qualifies-1T-OTP-Memory-IP-at-GLOBALFOUNDRIES-55nm-Low-Power-Process-Node.html</link> <title>Sidense Qualifies 1T-OTP Memory IP at GLOBALFOUNDRIES 55nm Low-Power Process Node </title> <description><![CDATA[<p><em><p>Sidense NVM Available on Several GLOBALFOUNDRIES' Processes From 28nm to 180nm for IoT and Other Key Applications</p></em></p><p>OTTAWA, ON--(Marketwired - Dec 29, 2015) - Sidense Corp., a leading developer of non-volatile memory OTP IP cores, today announced that it has fully qualified its SiPROM one-time programmable (OTP) non-volatile memory (NVM) embedded memory products on GLOBALFOUNDRIES' production-proven 55-nanometer (nm) Low-Power Enhanced (LPe) process technology platform.</p>]]></description> <pubDate>Tue, 29 Dec 2015 14:00 GMT</pubDate> <dc:identifier>1376451</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>Sidense</dc:contributor> <dc:modified>Thu, 22 Feb 2018 04:49 GMT</dc:modified> </item> <item> <guid isPermaLink="true">https://www.globenewswire.com/news-release/2015/12/10/1376448/0/en/Sunflower-Mission-Awards-59-University-Scholarships-to-Vietnam-s-Future-Engineers.html</guid> <link>https://www.globenewswire.com/news-release/2015/12/10/1376448/0/en/Sunflower-Mission-Awards-59-University-Scholarships-to-Vietnam-s-Future-Engineers.html</link> <title>Sunflower Mission Awards 59 University Scholarships to Vietnam's Future Engineers </title> <description><![CDATA[<p><em><p>Texas-Based Organization Has Delivered Over 14,000 Scholarships to Vietnamese Students</p></em></p><p>HO CHI MINH CITY, VIETNAM--(Marketwired - Dec 10, 2015) - On December 1, 2015 the Sunflower Mission presented a total of 59 university scholarships to engineering and technology students in HCMC and Da Nang. The Sunflower Mission was founded in 2002 to improve the lives of people in Vietnam through educational assistance programs and to also provide life-long leadership skills for students in America. The Sunflower Mission Engineering & Technology Scholarship Program focuses on students who demonstrate excellence in their academic studies as well as demonstrated qualities of leadership and giving back to the community. </p>]]></description> <pubDate>Thu, 10 Dec 2015 13:00 GMT</pubDate> <dc:identifier>1376448</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>eSilicon</dc:contributor> <dc:modified>Thu, 22 Feb 2018 04:49 GMT</dc:modified> </item> <item> <guid isPermaLink="true">https://www.globenewswire.com/news-release/2015/12/08/1376444/0/en/eSilicon-to-Present-Real-World-2-5D-Results-at-the-3D-ASIP-Conference.html</guid> <link>https://www.globenewswire.com/news-release/2015/12/08/1376444/0/en/eSilicon-to-Present-Real-World-2-5D-Results-at-the-3D-ASIP-Conference.html</link> <title>eSilicon to Present Real-World 2.5D Results at the 3D ASIP Conference </title> <description><![CDATA[<p><em><p>Methodology and Experience in Designing for 2.5D Interposers Will Be Discussed</p></em></p><p>SAN JOSE, CA--(Marketwired - Dec 8, 2015) - eSilicon, a leading semiconductor design and manufacturing solutions provider, will present at the 2015 3D Architectures for Semiconductor Integration and Packaging (ASIP) Conference held in Redwood City, Calif., December 15-17, 2015.</p>]]></description> <pubDate>Tue, 08 Dec 2015 13:00 GMT</pubDate> <dc:identifier>1376444</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>eSilicon</dc:contributor> <dc:modified>Thu, 22 Feb 2018 04:49 GMT</dc:modified> </item> <item> <guid isPermaLink="true">https://www.globenewswire.com/news-release/2015/12/08/1376437/0/en/eSilicon-to-Present-Newest-STAR-Online-Tool-Suite-at-CSIA-ICCAD-Dec-10-11-2015.html</guid> <link>https://www.globenewswire.com/news-release/2015/12/08/1376437/0/en/eSilicon-to-Present-Newest-STAR-Online-Tool-Suite-at-CSIA-ICCAD-Dec-10-11-2015.html</link> <title>eSilicon to Present Newest STAR Online Tool Suite at CSIA-ICCAD Dec 10-11, 2015 </title> <description><![CDATA[<p>SAN JOSE, CA--(Marketwired - Dec 7, 2015) - eSilicon, a leading semiconductor design and manufacturing solutions provider, will present at the CSIA-ICCAD 2015 Conference held in Tianjin, China, December 10-11.</p>]]></description> <pubDate>Tue, 08 Dec 2015 00:00 GMT</pubDate> <dc:identifier>1376437</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>eSilicon</dc:contributor> <dc:modified>Thu, 22 Feb 2018 04:49 GMT</dc:modified> </item> <item> <guid isPermaLink="true">https://www.globenewswire.com/news-release/2015/12/04/1376442/0/en/eSilicon-Opens-Office-in-Penang.html</guid> <link>https://www.globenewswire.com/news-release/2015/12/04/1376442/0/en/eSilicon-Opens-Office-in-Penang.html</link> <title>eSilicon Opens Office in Penang </title> <description><![CDATA[<p><em><p>New Asian Hub for Manufacturing Operations Officially Dedicated</p></em></p><p>PENANG, MALAYSIA--(Marketwired - Dec 3, 2015) -  eSilicon Corporation, a leading independent semiconductor design and manufacturing solutions provider, today officially dedicated its new Asian hub for manufacturing operations in Penang, Malaysia. </p>]]></description> <pubDate>Fri, 04 Dec 2015 00:00 GMT</pubDate> <dc:identifier>1376442</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>eSilicon</dc:contributor> <dc:modified>Thu, 22 Feb 2018 04:49 GMT</dc:modified> </item> <item> <guid isPermaLink="true">https://www.globenewswire.com/news-release/2015/12/03/1376440/0/en/Sidense-Qualifies-1T-OTP-Memory-IP-at-SMIC-130nm-and-110nm-Processes.html</guid> <link>https://www.globenewswire.com/news-release/2015/12/03/1376440/0/en/Sidense-Qualifies-1T-OTP-Memory-IP-at-SMIC-130nm-and-110nm-Processes.html</link> <title>Sidense Qualifies 1T-OTP Memory IP at SMIC 130nm and 110nm Processes </title> <description><![CDATA[<p><em><p>Sidense Now Supports Several Popular SMIC Processes From 40nm to 130nm for IoT and Other Key Market Segments</p></em></p><p>OTTAWA, ON--(Marketwired - Dec 3, 2015) - <strong> </strong>Sidense Corp., a leading developer of non-volatile memory OTP IP cores, today announced that it has fully qualified its SiPROM one-time programmable (OTP) non-volatile memory (NVM) embedded memory products at SMIC's (Semiconductor Manufacturing International Corporation) 130nm and 110nm G processes. This expands Sidense's coverage of SMIC processes from 40nm to 130nm. Other 1T-OTP memory macros are under development for additional SMIC processes to address customer requirements for device development targeting applications in the Smart Connected Universe.</p>]]></description> <pubDate>Thu, 03 Dec 2015 14:00 GMT</pubDate> <dc:identifier>1376440</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>Sidense</dc:contributor> <dc:modified>Thu, 22 Feb 2018 04:49 GMT</dc:modified> </item> <item> <guid isPermaLink="true">https://www.globenewswire.com/news-release/2015/11/17/1376435/0/en/Sidense-an-Inaugural-Member-of-the-Core-Store.html</guid> <link>https://www.globenewswire.com/news-release/2015/11/17/1376435/0/en/Sidense-an-Inaugural-Member-of-the-Core-Store.html</link> <title>Sidense an Inaugural Member of the Core Store </title> <description><![CDATA[<p><em><p>Sidense 1T-OTP Products Now Listed on the Core Store Website</p></em></p><p>OTTAWA, ON--(Marketwired - Nov 17, 2015) - Sidense Corp., a leading developer of non-volatile memory OTP IP cores, today announced that it is an inaugural member of the Core Store, a new semiconductor intellectual property portal. Sidense's 1T-OTP non-volatile memory (NVM) products, covering a broad range of silicon foundries, process nodes and variants, are listed on the site, along with key attributes of each. </p>]]></description> <pubDate>Tue, 17 Nov 2015 14:00 GMT</pubDate> <dc:identifier>1376435</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>Sidense</dc:contributor> <dc:modified>Thu, 22 Feb 2018 04:49 GMT</dc:modified> </item> <item> <guid isPermaLink="true">https://www.globenewswire.com/news-release/2015/10/27/1376433/0/en/eSilicon-Releases-Online-Quoting-Support-for-TSMC-16FF.html</guid> <link>https://www.globenewswire.com/news-release/2015/10/27/1376433/0/en/eSilicon-Releases-Online-Quoting-Support-for-TSMC-16FF.html</link> <title>eSilicon Releases Online Quoting Support for TSMC 16FF+ </title> <description><![CDATA[<p><em><p>Technology Support for MPW and GDSII Explorer Tools Expanded</p></em></p><p>SAN JOSE, CA--(Marketwired - Oct 27, 2015) - eSilicon Corporation, a leading independent semiconductor design and manufacturing solutions provider, today announced that its MPW and GDSII Explorer tools now provide support for TSMC's 16nm FinFET Plus (TSMC 16FF+) technology. </p>]]></description> <pubDate>Tue, 27 Oct 2015 12:00 GMT</pubDate> <dc:identifier>1376433</dc:identifier> <dc:language>en</dc:language> <dc:publisher>GlobeNewswire Inc.</dc:publisher> <dc:contributor>eSilicon</dc:contributor> <dc:modified>Thu, 22 Feb 2018 04:49 GMT</dc:modified> </item> </channel> </rss>